Computer system with high speed data transfer capabilities

Details Computer system with high speed data transfer capabilities Computer system with high speed data transfer capabilities

G - Physics

06

F

354/235

G06F 13/42 (2006.01) G06F 13/28 (2006.01)

Patent

CA 1326714

COMPUTER SYSTEM WITH HIGH SPEED DATA TRANSFER CAPABILITIES Abstract of the Disclosure The present invention is a computer system which can perform master unit controlled memory accesses at a first rate, DMA controlled operations at a second rate and burst operations of both types at a higher third rate. The burst operation is set up by performing a standard access cycle, thus setting up the dynamic random access memory row address, and then performing a series of fast, column address-only accesses to the same page of memory. The fast mode must be exited to a standard rate access whenever a page boundary is crossed, with burst operations recommencing thereafter. Wait states can be inserted in all type operations. Thirty-two bit master units can downshift or step down to 16 bit operation to respond to 16 bit burstable responding units. Timing diagrams and controller state machines are disclosed.

609037

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