Computing system having fault containment

Details Computing system having fault containment Computing system having fault containment

G - Physics

06

F

G06F 11/16 (2006.01) G06F 15/16 (2006.01)

Patent

CA 2251455

A multi-processor, shared memory computing system is disclosed. The system comprises a plurality of processing element modules, input/output processor modules and shared memory modules interconnected with the processing elements and input/output processors. The modules are interconnected by point to multi-point communication links. Each module has one transmit port and a plurality of receive ports interconnected through the links with transmit ports of other modules. Shared memory is updated and read by exchanging frames forming memory access transactions over these links. Between frames, idle codes are broadcast across the links. In response to locally sensing a failure at a module, a failed module modifies its idle code to reflect the failure. Interconnected modules lock-out a failed module in response to sensing an inhibit-on idle code at the receive ports. This facilitates the isolation and containment of faulty modules.

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