Consistent packet switched memory bus for shared memory...

Details Consistent packet switched memory bus for shared memory... Consistent packet switched memory bus for shared memory...

G - Physics

06

F

G06F 13/36 (2006.01) G06F 12/08 (2006.01) G06F 13/14 (2006.01) G06F 13/364 (2006.01)

Patent

CA 2051222

A shared memory multiprocessor having a packet switched bus for transferring data between a plurality processors, 1/O devices, cache memories and main memory employs a bus protocol which permits multiple copies of data to be updated under the control of different processors while still ensuring that all processors and all I/O devices have access to consistentvalues for all data at all times.

Multiprocesseur à mémoire partagée muni d'un bus à commutation par paquets pour transférer des données entre un certain nombre de processeurs, des dispositifs d'entrée-sorties, des antémémoires et la mémoire principale. Le multiprocesseur se sert d'un protocole bus qui permet de mettre à jour de multiples copies de données sous la commande de différents processeurs tout en continuant de s'assurer que tous les processeurs et les dispositifs d'entrée-sorties ont accès en tout temps à des valeurs constantes pour toutes les données.

Affiliated with

Also associated with

Rating

Consistent packet switched memory bus for shared memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Consistent packet switched memory bus for shared memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Consistent packet switched memory bus for shared memory... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1349685