Constant-current integrated power supply

H - Electricity – 02 – M

Patent

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H02M 3/07 (2006.01)

Patent

CA 2055898

A positive energizing voltage is converted by a pair of buffer capacitors and a filter capacitor to a particular negative potential. Each buffer capacitor is charged during a half clock signal cycle, the first during positive half cycles and the second during negative half cycles. Each buffer capacitor discharges through a circuit including a switch which has at each instant a variable state of conductivity dependent upon the magnitude of the negative potential at that instant. This magnitude is varied in accordance with the variations in the state of the switch conductivity to regulate the negative potential at a particular value, as opposed to the magnitude changing, as is the tendency in prior art CMOS circuits. The filter capacitor is charged by the negative potential and is discharged to the load briefly during every change in the clock signal polarity.

Une tension d'excitation positive est convertie par une paire de condensateurs d'amortissement et par un condensateur de filtrage en une tension négative particulière. Chaque condensateur d'amortissement est chargé durant la moitié d'un cycle d'un signal d'horloge, le premier durant l'alternance positive et le second durant l'alternance négative. Chaque condensateur d'amortissement se décharge dans un circuit comportant un commutateur ayant à chaque instant un état de conductivité variable qui dépend de la grandeur de la tension négative du moment. Cette grandeur varie selon l'état de conductivité du commutateur pour stabiliser la tension négative à une valeur particulière plutôt que de la laisser varier comme c'est généralement le cas dans le circuit CMOS actuels. Le condensateur de filtrage est chargé par la tension négative et est déchargé brièvement dans la charge à chaque variation de signe du signal d'horloge.

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