Contact programmable wiring and cell array architecture

Details Contact programmable wiring and cell array architecture Contact programmable wiring and cell array architecture

H - Electricity

01

L

H01L 27/118 (2006.01) H01L 23/50 (2006.01) H01L 23/535 (2006.01)

Patent

CA 2140171

Integrated circuits with architecture resembling a row-based gate array are prefabricated up to, and including, the metallic interconnection, and stocked. To fabricate a prototype of an Application-Specific IC, a single application-specific mask is used to connect wires existing on a prefabricated IC with Top Level Vias (via-like connecting structures, TLV), upon which the prototype may be passivated, bonded, packaged, and tested. For mass-production of an Application-Specific IC, a typical IC fabrication process is employed, using the same masks are used as for the prefabricated ICs, with the exception of the mask of vias for connecting the metal interconnection layers, which is modified to produce the same connections as those introduced by the TLVs added during the prototyping. The single-mask-programmable aspect of the invention is facilitated by the general- purpose wiring channels (220) adjacent to rows of programmable cells (211). Channels (220) comprise wiring patterns (222A and 222B), each containing a grid of two levels of initially unconnected wires, positioned so as to facilitate using either conventional vias or the TLVs for connecting wires within each pattern, wires in a pattern to wires in an adjacent patterns, and wires in a pattern to wires in an adjacent programmable cell (211). Programmable cells (211) are designed so as to facilitate implementing a set of different logical functions with appropriately positioned conventional vias or TLVs. As a result, the cost and time required for fabrication of a prototype are reduced, and the conversion to mass-production is simplified over typical methods used in prior art.

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