Control of substrate injection in lateral bipolar transistors

H - Electricity – 01 – L

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H01L 21/76 (2006.01) H01L 21/74 (2006.01) H01L 27/02 (2006.01) H01L 29/735 (2006.01)

Patent

CA 1205923

ABSTRACT A method for fabricating a serniconductor structure which reduces substrate current injection from lateral bipolar transistors. A buried layer of a first conductivity type is formed in a semiconductor substrate of opposite conductivity. An epitaxial layer of the first conductivity type is formed such that at least a portion of the epitaxial layer overlies the buried layer. Isolation oxide regions are formed in the epitaxial layer. The isolation oxide regions extend to the substrate to define an island of electrically isolated epitaxial material. A selected impurity of the first conductivity type is introduced into that portion of the epitaxial layer beneath the to-be-formed lateral transistor. The lateral transistor is formed in the epitaxial layer.

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