Control store checking system and method

Details Control store checking system and method Control store checking system and method

G - Physics

11

C

354/224, 354/239

G11C 29/00 (2006.01) G06F 11/10 (2006.01) G06F 11/28 (2006.01)

Patent

CA 1081853

ABSTRACT OF THE DISCLOSURE A control store system provides for automatic detection of errors produced by faults in the circuits of the system during both normal and test operations. The system includes a control store and associated address and control circuits. The address and control circuits include a plurality of control address registers and an incrementing circuit. Each storage location of the control store includes a previously generated parity check bit which represents odd parity for the address corresponding to the nest sequential storage location. Each of the control registers couples to a parity check circuit. Each time the contents of a storage location within the control store memory are accessed, the parity check circuit of the register receiving the address contents pro- duced by the incrementing circuit is checked for odd parity to determine whether the information accessed is correct and whether the incrementing circuit, the registers. and associated paths are free of faults.

266456

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