Control unit for an inverter

H - Electricity – 02 – M

Patent

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321/43

H02M 7/529 (2006.01)

Patent

CA 1189139

ABSTRACT OF THE DISCLOSURE A control unit for an inverter having an addressing memory which is loaded with an addressing table by a microprocessor for a respective fre- quency range of the inverter output voltage. In the addressing table, one column is provided for each addressing combination of the switches of the in- verter, the column containing the addressing combination itself and the number of clock pulses for which the addressing combination will be present. The columns are interrogated at different speeds depending upon the desired inverter output frequency. A frequency divider is addressed by a clock generator, the frequency divider receiving a division factor from the memory, the division factor being inversely proportional to the desired inverter output frequency. The output signal of the divider decrements a counter which is loaded with a number of clock pulses associated with the respective addressing combination. Upon achieving a zero count, a new column of the addressing table is provided at the output of the memory.

401029

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