Controller for input-queued packet switch

Details Controller for input-queued packet switch Controller for input-queued packet switch

H - Electricity

04

L

H04L 12/56 (2006.01) H04Q 11/04 (2006.01) B06B 1/02 (2006.01)

Patent

CA 2093849

Significant throughput improvement is achieved for an input queued packet switch using output port schedulers by permitting the output schedulers to recycle or reassign cell transmission times from input ports which are unable to use them. When an output scheduler assigns a cell transmission time to an input port and that input port is unable to use the assigned transmission time due to a scheduling conflict, for example, the input port makes a new request for the same output port during the next subsequent request period and then returns the unable transmission time assignment back to the output scheduler. The output scheduler stores the returned transmission time in a separate queue for assignment to later requests for the particular output port. Throughput performance is improved from 58% (without time slot recycling) to 92% (with time slot recycling) for random packet cell trafficmodels,

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