Controlling a bus with multiple system hosts

Details Controlling a bus with multiple system hosts Controlling a bus with multiple system hosts

G - Physics

06

F

G06F 11/20 (2006.01) G06F 13/40 (2006.01)

Patent

CA 2332296

In a method for swapping a system host board (150, 160, 170, 180), when a failure is detected on a first system processor board (150), control of a first CompactPCI bus (110) is transferred from a first system processor board system host (154) to a first bridge board system host (164). In an active/standby configuration, control of a second CompactPCI bus (120) is transferred from a second bridge board system host (184) to a second system processor board system host (174), and control of the devices on the first CompactPCI bus (110) and second CompactPCI bus (120) is transferred from the first system processor (152) to the second system processor (172) without resetting any devices on the system.

Dans un procédé d'échange d'une carte hôte système (150, 160, 170, 180), lorsqu'une anomalie est détectée sur une première carte (150) processeur système, la commande d'un premier bus CompactPCI (110) passe d'un premier hôte système (154) à carte processeur système à un premier hôte système (164) à carte passerelle. Dans une configuration d'activation/mise en attente, la commande d'un second bus CompactPCI (120) passe d'un second hôte système (184) à carte passerelle à un second hôte système (164) à carte processeur système et la commande des dispositifs sur le premier bus CompactPCI (110) et le second bus CompactPCI (120) passe du premier processeur système (152) au second processeur système (172) sans réinitialiser aucun dispositif sur le système.

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