Conveyorized plating line and method for electrolytically...

C - Chemistry – Metallurgy – 25 – D

Patent

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Details

C25D 17/18 (2006.01) C25D 17/10 (2006.01) C25D 17/28 (2006.01) C25D 21/12 (2006.01) H05K 3/00 (2006.01) H05K 3/24 (2006.01)

Patent

CA 2469880

To avoid voids in the metal layer in holes of printed circuit boards, a conveyorized plating line and a method for electrolytically metal plating printed circuit boards are proposed which provide measures for reducing an electric voltage that builds up between adjacent printed circuit boards being conveyed through the line.

Selon cette invention, afin d'éviter des vides dans la couche métallique dans des trous de cartes de circuits imprimés, une chaîne d'électrodéposition à transporteur et un procédé de revêtement métallique électrolytique de cartes de circuits imprimés permettent de réduire une tension électrique qui apparaît entre des cartes de circuits imprimés adjacentes transportées à travers la chaîne.

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