G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 15/16 (2006.01) G06F 9/38 (2006.01) G06F 9/50 (2006.01)
Patent
CA 2171018
A coprocessor system includes S-CPU in a game machine body and C-CPU in a cartridge, and these two CPU's are formed by the same CPU cores and have the same memory mapping functions. The access time of M-ROM in the cartridge is shorter than the cycle time of the C-CPU, which is shorter than that of the S-CPU. A period of time during which the access of the S-CPU to the M-ROM is allowed is set longer than the access time of the M-ROM and shorter than the cycle time of the S-CPU by a signal SSYNC. Accordingly, the access of the C-CPU to the M-ROM is allowed by the signal SSYNC during surplus time.
Un système co-processeur comporte une UC-S (18) prévue dans le corps (12) d'une machine de jeux et une UC-C (34) prévue dans une cartouche (14), ces deux UC étant formées par les mêmes noyaux d'UC et présentant les mêmes fonctions de mappage de mémoire. Le temps d'accès à la ROM-M (22) dans la cartouche (14) est plus court que la durée du cycle de l'UC-C (34), qui est plus courte que celle de l'UC-S (18). La période de temps durant laquelle l'accès de l'UC-S (18) à la ROM-M (22) est possible est plus longue que le temps d'accès de la ROM-M (22) et plus courte que la durée du cycle de l'UC-S (18) par un signal SSYNC. Dans ces conditions, l'accès de l'UC-C (34) à la ROM-M (22) est autorisé par le signal SSYNC durant le temps excédentaire.
Takahashi Toyofumi
Tanaka Toshio
Terakawa Hideaki
Gowling Lafleur Henderson Llp
Nintendo Co. Ltd.
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