Countermeasure to power attack and timing attack on...

Details Countermeasure to power attack and timing attack on... Countermeasure to power attack and timing attack on...

H - Electricity

04

L

H04L 9/30 (2006.01) G06F 9/302 (2006.01)

Patent

CA 2374541

A cryptography circuit provides secure processing of data by utilizing countermeasures that combat timing and power attacks. Superfluous operations such as multiplication operations, modular reductions by an integer, storage of data to memory are available for use by a processor to disguise the amount of power usage and the amount of time required to perform a cryptographic operation. A cryptographic key is available for use in order to trigger when these emulated operations occur. The occurrences of the emulated operations in controlled by the user to provide the preferred tradeoff between security and use of resources.

L'invention concerne un circuit cryptographique offrant un traitement sécurisé de données grâce à des contre-mesures destinées à combattre les attaques temporelles et les attaques de puissance. Un processeur peut utiliser des opérations superflues, telles que des opérations de multiplication, de réduction modulaire par un nombre entier et de stockage de données dans une mémoire, afin de déguiser la puissance utilisée et le temps requis pour l'exécution d'une opération cryptographique. Une clé cryptographique peut servir à lancer ces opérations émulées. Le lancement d'opérations émulées est commandé par l'utilisateur, qui peut ainsi trouver un équilibre entre sécurité et utilisation des ressources.

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