Current cell for converting a binary value to an analog value

H - Electricity – 03 – M

Patent

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Details

H03M 1/66 (2006.01) H03K 17/041 (2006.01) H03M 1/08 (2006.01) H03M 1/74 (2006.01)

Patent

CA 2161715

A digital value represented by binary signals is converted to a corresponding analog value by three (3) current cells, preferably C-MOS p-type, in a digital-to- analog converter (DAC). The three (3) transistors, preferably disposed on an integrated circuit chip, comprise (a) an input switch transistor receiving a digital input signal at its gate, (b) an output transistor providing an output current at its drain and (c) a current bias transistor. The switch and output transistor sources and the bias transistor drain are common. The output transistor gate is biased by a substantially constant voltage. The bias transistor source receives a supply voltage through a bonding pad on an integrated circuit chip and a bond wire extending from the pad to a pin on the chip package lead frame. At low frequencies (e.g. 100 MHz), the wave shape of the output transistor drain current is flat. At increased frequencies (e.g. 225 MHz), the output current has a spike from a supply voltage spike induced in the bond wire as a result of different magnitudes in the bias transistor current when the switch transistor responds to binary signals. A circuit compensates for the different current magnitudes in the bias transistor. The compensating circuit may include fourth and fifth transistors respectively corresponding to the current and input transistors to produce through the bond wire a current, with the input transistor non-conductive, corresponding to the current in such wire when the input transistor is conductive.

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