Data communication system

Details Data communication system Data communication system

H - Electricity

04

L

H04L 5/14 (2006.01) H04L 1/00 (2006.01) H04L 1/18 (2006.01) H04N 1/32 (2006.01) H04N 1/333 (2006.01)

Patent

CA 2112758

In order to combine an ARQ system and an FEC system, an error correction code is inserted between an error detection code for a variable-length ARQ frame and a frame boundary flag pattern. Information to be transmitted is divided into blocks having a suitable length by a block divider in accordance with a line quality judged by-a line quality judger, and then subjected to a framing operation by an information frame preparer. The information subjected to the framing operation is attached with a CRC code by a CRC code generation/application circuit, subjected by a zero insertion circuit to an insertion of a suitable number of zero bits therein to provide a distinguished frame boundary with a flag, and then transmitted.

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