Data compression usin multipel levels

H - Electricity – 03 – M

Patent

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H03M 7/30 (2006.01)

Patent

CA 2103445

2103445 9222141 PCTABS00018 A series of data processors (20a-20n) operate on a body of data to convert it to compressed form for storage or transmission. The processors are connected in series such that the output of one processor is the input to the next processor. Each processor has an associated memory (24a-24n). Each processor analyzes the serially input data elements in pairs to detect previously non-occurring pairs and stores those pairs in its memory. The output signal from each processor identifies the storage position in its associated memory of each input pair, whether or not the pair previously occurred. Each processor provides a single storage location output signal for each input pair of elements and maintains a count of the occurrences of each pair.

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