G - Physics – 06 – F
Patent
G - Physics
06
F
354/230
G06F 9/38 (2006.01) G01N 33/04 (2006.01) G01N 33/44 (2006.01) G06F 7/575 (2006.01) G06F 9/302 (2006.01)
Patent
CA 2039639
A multi-function ALU for use in digital data processing is described, which facilitates the execution of instructions in parallel, thereby increasing processor performance. The proposed apparatus reduces the instruction execution latency that results from data dependency hazards in a pipelined machine. This latency reduction is accomplished by collapsing the interlocks due to these hazards. The proposed apparatus achieves performance improvement while maintaining compatibility with previous implementations designed using an identical architecture.
Blaner Bartholomew
Phillips James Edward
Vassiliadis Stamatis
International Business Machines Corporation
Saunders Raymond H.
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