Data destination facility

Details Data destination facility Data destination facility

G - Physics

06

F

354/238

G06F 12/00 (2006.01) G06F 12/06 (2006.01)

Patent

CA 2028551

DATA DESTINATION FACILITY Abstract of the Disclosure A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module connected to a memory system. A RAM is addressed by the system address lines defining 128 kbyte blocks, with the output data providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module. Various other parameters such as write protect status and memory location are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided.

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