Data packet switching system

Details Data packet switching system Data packet switching system

H - Electricity

04

L

344/25

H04L 12/56 (2006.01)

Patent

CA 1282482

ABSTRACT The system comprises input modules (Pei) receiving entering packets, output modules (PSi) transmitting outgoing packets, a control memory (M) with double access and divided into routing modules (PTi, PAj), and a resource control module (GR). It also comprises an input time-division bus (BHDE) to connect timewise input modules (PEi) to routing modules (PTi, PAj) selected in the central memory (M) and an output time-division bus (BHDS) to connect timewise routing modules (PTi, PAj) of the central memory (M) to output modules (PSi). The control module (GR) is bidirectionally connected to the input modules (PEi) and to the central memory (M) through the input time-division bus (BHDE), on one hand, and to the output modules (PSi) and the central memory (M) by the output time-division bus (BHDS), on the other hand.

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