Data processing circuit operating on byte-by-byte basis

Details Data processing circuit operating on byte-by-byte basis Data processing circuit operating on byte-by-byte basis

G - Physics

06

F

354/230

G06F 13/00 (2006.01) G06F 9/308 (2006.01) G06F 9/315 (2006.01) G11C 8/00 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 1052472

DATA PROCESSING CIRCUIT OPERATING ON BYTE-BY-BYTE BASIS Abstract of the Disclosure A microprogammed processor which receives 16-bit words as input data from an I/O system, breaks down each received word into four 4-bit bytes, and performs all logical and arithmetic operations on a byte-by-byte basis. The processed bytes may either be stored for further use or reconstituted into 16-bit words and outputted to the I/O system. The processor includes two source busses for applying information to an arithmetic unit (AMU), a destination bus for receiving the AMU output, as well as circuits such as memories and registers for selectively applying AMU input information to the source busses and for receiving AMU output information from the destination bus. Certain ones of the memories can both apply information to source busses and receive information from the destination bus on the same machine operation. Microprogrammed controlled gating facilities specify the circuits that are to be connected to the busses on each machine operation.

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