Data processing system having multiple common buses

Details Data processing system having multiple common buses Data processing system having multiple common buses

H - Electricity

04

L

354/233, 340/84

H04L 5/14 (2006.01) G06F 13/362 (2006.01)

Patent

CA 1153079

ABSTRACT OF THE DISCLOSURE Multiple common buses are provided for coupling a plurality of units in a data processing system for trans- fer of information therebetween. The central processing unit (CPU) allocates the multiple common buses to one of the units in response to a bus requests received from various units desiring to use the common buses. Bus requests are generated in a synchronous manner by use of a timing signal originating in the CPU which is connected in series between the one or more units on each of the multiple common buses.

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