Data processing system using a separate input/output processor

Details Data processing system using a separate input/output processor Data processing system using a separate input/output processor

G - Physics

06

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340/89, 354/230.

G06F 15/18 (2006.01) G06F 9/46 (2006.01) G06F 12/10 (2006.01) G06F 13/10 (2006.01) G06F 13/12 (2006.01) G06F 13/24 (2006.01)

Patent

CA 1114911

ABSTRACT OF THE DISCLOSURE A data processing system having a host processor, a host memory, a host memory management unit and an input/output bus and further including a separate input/output (I/O) processor with its own local memory for handling the transfer of data between I/O devices on its own I/O processor I/O bus and the host main memory. The I/O processor has the capability of directly ac- cessing main memory via the host standard data channel. The I/O processor has the capability of interrupting the host processor operation in a special way (by a "micro-interrupt" process) such that the host processor thereby re- allocates the contents of a selected memory allocation unit (MAP) of the host memory management unit faster than using standard interrupt routines. Such re-allocation then permits the I/O processor to transfer data directly to and from the host main memory via the re-allocated memory management unit without the need for further processing by the host processor, the I/O processor pro- viding a suitable identification of the selected MAP which is to be re-allo- cated. The system further prevents access to the host memory by any other I/O processor while a first I/O processor is performing a read-modify-write operation with respect to the host memory.

320117

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