Data retention circuit

Details Data retention circuit Data retention circuit

G - Physics

06

F

354/246

G06F 12/16 (2006.01) G06F 9/46 (2006.01) G06F 11/14 (2006.01)

Patent

CA 1191278

DATA RETENTION CIRCUIT Abstract of the Disclosure A circuit for retention of electrically encoded data is provided that synchronizes the functions of a processor unit generating the data and a memory unit storing the data during a power- down sequence. A voltage comparator provides a signal when power to the circuit drops below a predetermined level, and the signal actuates transfer of data from volatile Random Access Memory to non-volatile Electrically Erasable Programmable Read Only Memory. A logic gate synchronizes the functions of the voltage comparator, processor, and memory units such that data is transferred between volatile and non-volatile memory and the processor is reset only after the processor has completed the servicing of any interrupt routines it may be running at the beginning of the power-down sequence.

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