H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 9/06 (2006.01) G06F 21/00 (2006.01) G11C 7/24 (2006.01) G11C 16/22 (2006.01) G06F 1/00 (2006.01)
Patent
CA 2080299
A data security arrangement is provided to protect configuration data CDI to be stored in static random access memories SRAM in semiconductor programmable logic devices PLD. The configuration data, which is vulnerable to illegal duplication, is normally held in a read only memory ROM, typically an erasable programmable read only memory. A data coding means is provided to code the configuration data to be loaded to the PLD and a data decoding means is provided in the PLD to decode the coded configuration data. The coding and decoding means each incorporate maximal length shift registers which generate a pseudo-random sequence of bits. A key value is input to the shift register in the coding means forcing it to start at a particular point in the sequence. The output (bits B28 and B31) of this register is combined in an EXCLUSIVE-OR gate with configuration data and coded data is written to the read only memory ROM. The decoding means in the PLD has a corresponding key value held in a non-volatile memory in the PLD. This is applied to the register of the decoding means, whose output (bits B28 and B31) are combined in an EXCLUSIVE-OR gate with coded configuration data CDIC read from the ROM to produce decoded configuration data CDOD to be stored in the memories.
Finlayson & Singlehurst
Motorola Inc.
Pilkington Micro-Electronics Limited
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