G - Physics – 06 – F
Patent
G - Physics
06
F
354/233
G06F 13/00 (2006.01) G06F 13/374 (2006.01)
Patent
CA 1179069
ABSTRACT OF THE DISCLOSURE In a multiprocessor system having a main memory and a plurality of processors connected through common address bus, data bus and answer bus for the data trans- fer, a data transmission apparatus is provided for each of the main memory and the processors and includes bus request control lines for transferring bus request signals and bus control signals and a bus controller for separately controlling selections of the address bus, the data bus and the answer bus in response to the signals on the bus request control lines and the request signal. Overlapped processing such as data write and data write answer or data read and data read answer in one cycle is permitted.
400616
Bandoh Tadaaki
Fukunaga Yasushi
Hiraoka Ryosei
Ide Jushi
Kawakami Tetsuya
Bandoh Tadaaki
Fukunaga Yasushi
Hiraoka Ryosei
Hitachi Ltd.
Hitachi Engineering Co. Ltd.
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