Decision timing control circuit

Details Decision timing control circuit Decision timing control circuit

H - Electricity

03

D

329/3

H03D 3/18 (2006.01) H04L 7/02 (2006.01) H04L 7/04 (2006.01)

Patent

CA 1261928

ABSTRACT A decision timing control circuit particularly for use in demodulating multi-level QAM signals is disclosed. The circuit includes a demodulator which demodulates a multi-level modulated received signal and outputs a multi-level signal, and an A/D convertor operatively connected with the demodulator for converting the multi-level signal input into a corresponding digital signal. A clock recovery circuit operatively connected with the demodulator, recovers the clock from the multi-level signal. A variable phase shifter is operatively connected with the clock recovery circuit and the A/D convertor for outputting the phase of the recovered clock to the A/D convertor by shifting it with an applied control signal. An error rate detector operatively connected with the A/D convertor outputs a value corresponding to the actual error rate as the error rate information by obtaining such value based on the digital signal. Finally, the decision-timing control circuit includes a phase controller which is operatively connected with the error rate detector and the variable phase shifter for varying the amount of phase shift at the variable phase shifter with the control signal so that the error rate becomes small on the basis of the error rate information.

539900

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