Decoder apparatus

H - Electricity – 03 – M

Patent

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354/103, 354/226

H03M 13/00 (2006.01) G11B 20/18 (2006.01)

Patent

CA 2022024

A decoding apparatus in which for plural symbols arranged in a matrix fashion first and second error correction codes are encoded for each of the plural symbols respectively arranged in a first direction and in a second direction and in which input data is transmitted in the first direction. The decoding apparatus includes a first memory for writing input data, an error detector for detecting an error of the input data that is written into the first memory based on the first error correcting code and for generating error data from the first error correction code. A second memory is provided for writing error data of the first error correction code and an error corrector is provided for sequentially executing error corrections of the first and second error correction codes for the input data that is written into the first memory by using the error data of the first error correction code that is written into the second memory.

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