Decoding method for t1 line format for ccitt 32k bit per...

Details Decoding method for t1 line format for ccitt 32k bit per... Decoding method for t1 line format for ccitt 32k bit per...

H - Electricity

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H04L 25/49 (2006.01) H04J 3/06 (2006.01) H04J 3/12 (2006.01) H04J 3/16 (2006.01) H04L 7/00 (2006.01)

Patent

CA 1301931

A DECODING METHOD FOR T1 LINE FORMAT FOR CCITT 32K BIT PER SECOND ADPCM CLEAR CHANNEL TRANSMISSION AND 64 KBPS CLEAR CHANNEL TRANSMISSION ABSTRACT OF THE INVENTION The present method is a decoding scheme for suppressing excessive amount of zeroes transmitted via a Tl line facility. Clear channel transmission capability is provided by this scheme for 32 kb/s or 64 kb/s transmission channels. This scheme provides the proper zero bit suppression for alternating mark inversion signaling (AMI). A proper AMI signal contains no more then 15 consecutive zero bit positions. In addition to meeting the AMI signaling standards, this scheme does not induce any violations of VMR (violation monitor and removal) equipment. Thus, this scheme is transparent to existing line equipment and error monitoring equipment. This scheme provides both a necessary and sufficient method for achieving the AMI signaling requirements during clear channel signaling.

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