Deferred comparison multiplier checker

Details Deferred comparison multiplier checker Deferred comparison multiplier checker

G - Physics

06

F

354/127, 354/167

G06F 7/52 (2006.01)

Patent

CA 2019064

In a data processing system, a multiplication operation is immediately followed by a redundant multiplication operation, using the same, albeit altered, operands, to check the initial result. The initial result is immediately available for use, but the check is not performed until some time later. The original operands are altered for the redundant multiplication operation by shifting one operand 1 bit, and swapping them before multiplication.

Dans un système de traitement de données, une opération de multiplication est immédiatement suivie d'une opération de multiplication redondante, utilisant les mêmes opérandes, bien que modifiés, pour vérifier le résultat initial. Ce dernier est immédiatement utilisable, mais la vérification n'est effectuée que quelque temps plus tard. Les opérandes d'origine sont modifiés pour l'opération de multiplication redondante par le décalage d'un opérande de 1 bit, et leur permutation avant la multiplication.

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