H - Electricity – 03 – D
Patent
H - Electricity
03
D
329/2
H03D 1/00 (2006.01) H04L 7/02 (2006.01) H04L 25/03 (2006.01)
Patent
CA 2002585
ABSTRACT OF THE DISCLOSURE In a digital demodulator, a recovered baseband signal is sampled in response to a clock pulse supplied from a VCO and converted to a digital signal representing one of multilevels of the sampled signal. Real-axis and imaginary-axis transversal equalizers are provided. Each equalizer has a tapped delay line for receiving the digital signal, a plurality of tap weight multipliers connected respectively to taps of the tapped delay line, and an adder. The adder of the real-axis transversal equalizer sums all outputs of the tap weight multipliers except for the output of one which is connected to a tap adjacent to the center tap for producing a partially equalized signal, while the adder of the other equalizer sums all outputs of the tap weight multipliers for producing a fully equalized signal. Both of the equalized signals are summed by an adder and applied to a phase control circuit which derives from it a VCO control signal so that it corresponds to a tap-weight control signal applied to the multiplier whose output is excluded from being summed by the adder of the real-axis transversal equalizer. The output of the adder is summed with the excluded multiplier output and supplied to a tap weight controller which controls the multipliers of both transversal equalizers.
Corporation Nec
Smart & Biggar
LandOfFree
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