Depletion isolated semiconductor on insulator structures

Details Depletion isolated semiconductor on insulator structures Depletion isolated semiconductor on insulator structures

H - Electricity

01

L

356/144

H01L 27/06 (2006.01) H01L 21/00 (2006.01) H01L 21/86 (2006.01) H01L 27/12 (2006.01) H01L 29/00 (2006.01)

Patent

CA 1040320

ABSTRACT An integrated circuit device comprises a layer of semiconductor material on an insulating substrate. At least two spaced-art circuit components, such as field-effect transistors, are formed in the layer of semiconductor material. The circuit components are electrically isolated from each other by a method of (1) forming a layer of insulating material over the layer of semiconductor material and between the circuit components, (2) forming a layer of electrically conductive material over the layer of insulating material, and (3) providing bias means between the layer of conductive material and the layer of semiconductor material so as to deplete completely a region in the layer of semiconductor material opposite to the layer of conductive material and between the circuit components. -1-

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