Design analysis workstation for analyzing integrated circuits

Details Design analysis workstation for analyzing integrated circuits Design analysis workstation for analyzing integrated circuits

G - Physics

06

F

G06F 17/50 (2006.01) G06T 7/00 (2006.01) H01L 21/66 (2006.01)

Patent

CA 2370766

A design analysis workstation for performing design analysis of integrated circuits provides facilities for extracting design and layout information from digital image-mosaics captured during deconstruction of an integrated circuit. Each image-mosaic is displayed in at least one mosaic-view as a background image that is overlaid with at least one annotation overlay. An engineer analyst creates annotation objects on the annotation overlay based on information inferred concurrently from one or more image-mosaics. Concurrent display of a plurality of image-mosaics facilitates the understanding of interrelations between components on different layers.

La présente invention concerne une station de travail d'analyse de conception permettant d'analyser la conception de circuits intégrés qui présente des installations permettant d'extraire une conception et des informations relatives à la topologie provenant de mosaïques d'images capturées pendant la déconstruction d'un circuit intégré. Chaque mosaïque d'images est affichée dans au moins une vue mosaïque sous forme d'image de fond sur laquelle au moins une annotation vient se superposer. Un ingénieur analyste crée des objets d'annotation sur cette superposition d'annotation à partir d'informations induites simultanément en provenance d'une ou de plusieurs mosaïques d'images. L'affichage simultané d'une pluralité de mosaïques d'images facilite la compréhension des interdépendances entre des composants de différentes couches.

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