H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/43
H01L 23/12 (2006.01) H01L 23/14 (2006.01) H01L 23/538 (2006.01)
Patent
CA 2024848
DESIGN SYSTEM FOR VLSI CHIPS ARRANGED ON A CARRIER AND MODULE THUS DESIGNED ABSTRACT A system design for VLSI chips arranged on a carrier and the module thus designed is described. In a top-down design system synoptically and simultaneously an electrical circuitry is optimized by designing synoptically the chips and the chip carrier. The overall logic is divided in partitions which fit on chips. A chip placement on the carrier is performed considering minimum overall connection length and providing preferably parallel connection. Input/Output contacts are assigned on chips vis-a-vis each other when they correspond. They are connected by parallel lines. The design of the several chips is done from outside to inside, starting with the assigned I/O contacts. Overall, in combining optimum overall design and optimum chip design, a semiconductor thin film silicon multichip module of high yield and performance is provided. A carrier that is included in the design from the beginning, preferably a thin film passive silicon carrier, is used.
Schettler Helmut
Schulz Uwe
Zuehlke Rainer
International Business Machines Corporation
Rosen Arnold
Schettler Helmut
Schulz Uwe
Zuehlke Rainer
LandOfFree
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