Detector tolerant of frequency misalignment

H - Electricity – 03 – D

Patent

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Details

H03D 1/00 (2006.01) H03L 7/099 (2006.01) H04J 1/05 (2006.01) H04L 1/00 (2006.01) H04L 1/06 (2006.01) H04L 5/06 (2006.01) H04L 27/06 (2006.01) H03L 7/093 (2006.01)

Patent

CA 2374477

A method to separate data transmitted in parallel at arbitrary frequencies within a channel includes: separating a signal from one channel into a plurality of bins representing sub-channels, each bin having a bin frequency (902); generating a locked frequency by applying a phase locked loop (PLL) to each sub-channel (904); determining a difference between the locked frequency and the bin frequency(906); and correlating the signal with a difference between the locked frequency and the bin frequency (910).

Cette invention concerne un procédé de séparation de données transmises en parallèle à des fréquences arbitraires sur un canal donné. Le procédé comprend les phases suivantes: séparation du signal d'un canal en une pluralité de compartiments représentant des sous-canaux, chaque compartiment possédant une fréquence de compartiment; production d'une fréquence à verrouillage par application d'une boucle à phase asservie à chacun des sous-canaux; détermination d'une différence entre la fréquence à verrouillage et la fréquence de compartiment; mise en corrélation du signal avec la différence entre la fréquence à verrouillage et la fréquence de compartiment.

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