Device and method for efficient timing estimation in a...

H - Electricity – 04 – L

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H04L 7/00 (2006.01) H04B 1/18 (2006.01) H04B 7/08 (2006.01) H04L 7/02 (2006.01)

Patent

CA 2174764

The present invention provides for economical predictive symbol timing estimation in a digital receiver by reducing gate count and current drain. The invention also reduces the processing delay. The predictive symbol timing estimation method (300) and device (200) are applicable to any digital radio system which transmits on a continuous or semi-continuous basis.

Cette invention concerne l'estimation économique et prédictive de la synchronisation des symboles dans un récepteur numérique par réduction du nombre de portes et la consommation de courant; et par réduction du temps de traitement. Le procédé (300) et le dispositif (200) de prédiction de l'estimation de la synchronisation des symboles peuvent s'appliquer à n'importe quel faisceau hertzien numérique qui émet sur une base continue ou semi-continue.

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