Device package and methods for the fabrication and testing...

Details Device package and methods for the fabrication and testing... Device package and methods for the fabrication and testing...

H - Electricity

01

L

H01L 23/48 (2006.01) G01M 3/00 (2006.01) G02B 6/00 (2006.01) G02B 6/42 (2006.01) H01L 21/30 (2006.01) H01L 21/48 (2006.01) H01L 23/28 (2006.01) H01L 23/34 (2006.01)

Patent

CA 2481616

Provided are methods of foaming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.

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