Diagnosting reliability of vias by e-beam probing

G - Physics – 01 – R

Patent

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G01R 31/307 (2006.01)

Patent

CA 2409411

Electronic devices, such as IC devices, are tested by determining a failure net within the electronic device that is causing a device failure. After identifying the failure net, the failure net is locally stressed. The stress is applied so that only the net being tested is subjected to the stress, and the remaining nets and components of the device are not stressed. A change in a signal produced by the failure net is observed while the failure bet is being subjected to the stress. The testing in this manner assists in identifying the failure net as a failure source of the device.

Selon l'invention, des dispositifs électroniques, tels que des dispositifs de circuits intégrés, sont testés par détermination d'une maille de défaillance à l'intérieur du dispositif électronique, qui provoque une défaillance du dispositif. Après identification de la maille de défaillance, on applique une contrainte locale à la maille de défaillance. La contrainte est appliquée de façon que seule la maille testée soit soumise à la contrainte, et que les mailles restantes et les composants du dispositif ne soient pas soumis à la contrainte. On observe un changement dans un signal produit par la maille de défaillance lorsque cette maille est soumise à la contrainte. Tester de cette façon permet d'aider à identifier la maille de défaillance comme source de défaillance du dispositif.

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