Dielectrically stabilized gaas fet oscillator with two power...

Details Dielectrically stabilized gaas fet oscillator with two power... Dielectrically stabilized gaas fet oscillator with two power...

H - Electricity

03

B

331/68, 347/9

H03B 5/12 (2006.01) H03B 5/18 (2006.01) H03B 1/00 (2006.01) H03B 1/04 (2006.01)

Patent

CA 1253222

ABSTRACT A dielectrically stabilized planar GaAs FET oscillator has a single gate transistor with a gate terminal and a drain terminal. A cylindrically shaped dielectric resonator is mounted on a ceramic support. The dielectric resonator resonates in a TE01 mode and is located on the gate line of the transistor a predeterminated distance from the gate terminal. The transistor is biased so that the dielectric resonator alone can stabilize the power produced by the transistor. Stabilized output power is obtained from both the drain terminal and the gate terminal. With previous oscillators having a single gate transistor, output power could only be obtained from one terminal.

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