Differential charge transfer sense amplifier

Details Differential charge transfer sense amplifier Differential charge transfer sense amplifier

G - Physics

11

C

328/177, 352/82.

G11C 7/06 (2006.01) G11C 11/24 (2006.01) G11C 11/404 (2006.01) G11C 11/4091 (2006.01)

Patent

CA 1058321

DIFFERENTIAL CHARGE TRANSFER SENSE AMPLIFIER Abstract of the Disclosure A differential charge transfer amplifier which functions as a sensing and regenerating circuit responsive to binary Information represented by the level of charge in a stored charge memory cell is disclosed. The sense amplifier includes a pair of dummy cells and bucket brigade amplifiers which are connected on either side of a dynamic latching circuit which includes a plurality of actuable gate devices, which may be field effect transistors A bit/sense line of the array is divided into two equal sections which are respectively connected to either side of the sense amplifier. The operation of the amplifier is cyclic, including a precharge period, a sensing period, a rewrite period and a restore period, after which the amplifier is in its original state. A feature of the amplifier is that it consumes no d.c. power other than leakage and has Nigh sensitivity due to a charge transfer feature. Also, during the operation of the circuit, energy remaining in one of the bit line sections after rewriting is utilized to pre-bias both bit line sections to an initial level. As a result, this allows better control of the precharge level on the bit/sense line and in so doing, the power requirements are substantially reduced. At the same time, a dummy cell is charged to the potential of the now balanced bit lines. -1-

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