Differential load circuit equipped with field-effect...

G - Physics – 05 – F

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G05F 1/44 (2006.01) H03F 3/345 (2006.01) H03F 3/45 (2006.01)

Patent

CA 1169488

PHN 9687 15 ABSTRACT: A differential load circuit which can be used as a load for a differential pair and which comprises a first, second, third and fourth field-effect transistor of the same conductivity type, whose gate electrodes are interconnected. The source electrodes of the first and second transistors are connected to a first power supply terminal and the drain electrodes of the third and fourth transistors to a second power supply terminal via quies- cent current sources. A first input terminal is con- nected to the interconnected source electrode of the third transistor and the drain electrode of the first transistor and a second input terminal is connected to the interconnected source electrode of the fourth trans- istor and the drain electrode of the second transistor, whilst an output terminal is connected to the drain elec- trode of the fourth transistor. The first and second input terminal may be coupled to the drain electrodes of a differential pair of transistors. Biasing means, which are coupled to the gate electrodes of the four transis- tors, supply such a voltage to the gate electrodes that the common-mode drain currents of the third and the fourth transistor correspond to the currents supplied by the quiescent current sources.

371261

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