Digital analog converter

H - Electricity – 03 – K

Patent

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354/97

H03K 13/02 (1980.01)

Patent

CA 1137228

Abstract of the Disclosure A digital-analog converter comprising a reference value adder having its multidigit input coupled to a multi- digit output of a switch unit and a Fibonacci p-code convolution unit which has its multidigit output coupled to a multidigit input of the switch unit. The Fibonacci p-code convolution unit comprises n stages, each of which, related to a certain bit position in a range from one to n - 2, comprises an AND gate and an OR gate. Each of the stages corresponding to bit positions from zero to n - 1 comprises a flip-flop, an OR gate and an AND gate. The set and reset inputs of the flip-flop are coupled, respectively, to the output of the AND gate and to the output of the OR gate, the set input of the flip-flop of the stage of the zeroth bit position is a counting input of the digital- analog converter, first and second inputs of the OR gate of the stage of the ith bit position are coupled, respec- tively, to the outputs of the AND gates of the (i + 1)th and (i + p + 1)th stages, first, second and third inputs of the AND gate of the ith stage, beginning with the (p + 1)th stage, are coupled, respectively, to the reset output of the flip-flop of the same stage, to the set output of the flip-flop of the (i - 1)th stage and to the set output of the flip-flop of the (i - p - 1)th stage, and the remaining inputs of all the AND gates are joined together to constitute a clock input of the digital-analog converter, where n is the length of the Fibonacci p-code and i = 0,1,2, ..., n - 1.

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