Digital arithmetic unit

Details Digital arithmetic unit Digital arithmetic unit

G - Physics

06

F

354/204

G06F 7/50 (2006.01)

Patent

CA 1211847

ABSTRACT OF THE DISCLOSURE A digital arithmetic unit useful in data processing digital circuit comprises a plurality of stages each having two half-adders combined into a full adder and a carry logic element. An objective is to shorten the processing time for the addition and subtraction of binary numbers. For this purpose, the stages are divided into at least two groups and two separate carry paths are provided within each group. One of the carry paths is only switched on by means of selection logic elements. The activation occurs sequentially in group-wise fashion after simultaneous carry runs in all carry paths. The advantage particularly consists of the chronological coincidence of the carry runs in all groups.

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