Digital circuit generating a vital delay

Details Digital circuit generating a vital delay Digital circuit generating a vital delay

G - Physics

05

B

354/231, 342/19.

G05B 24/02 (2006.01) G01R 23/14 (2006.01) G04F 1/00 (2006.01) G06F 17/00 (2006.01)

Patent

CA 1115812

Abstract of the Disclosure A microprocessor based vital delay circuit is provided which is arranged to emit an output no less than a pre- determined time after an input stimulus. The predetermined time, which corresponds to the delay, is controlled by selecting the relationship between two quantities. A digital processor performs a series of computations on the two quantities, each computation is arranged to take uni? time and by selecting the proper relationship between the two quantities, the total series of computations takes a predetermined amount of time. Before the output is allowed to occur, several checks are performed to insure that no hardware or sofeware failure have erroneously gen- erated the result. One novel checking technique insures that the clock frequency has not changed, and this tech- nique is applicable to a wide variety of devices in which digital techniques are employed.

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