Digital computer for implementing event driven simulation...

Details Digital computer for implementing event driven simulation... Digital computer for implementing event driven simulation...

G - Physics

06

F

354/1

G06F 15/16 (2006.01) G06F 9/28 (2006.01) G06F 13/40 (2006.01) G06F 17/50 (2006.01)

Patent

CA 1234630

ABSTRACT OF THE DISCLOSURE A computer for implementing an event driven algorithm which is used in conjunction with a master computer is disclosed. The computer includes a plurality of processors coupled in a ring arrangement each of which is microprogrammable. Each processor includes a memory and a memory address generator. The generator can generate addresses based on a combination of signals from both the microcode and signals on the data bus.

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