Digital data processing arrangement

G - Physics – 06 – F

Patent

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354/227, 354/231

G06F 11/08 (2006.01) G06F 11/16 (2006.01)

Patent

CA 1078967

ABSTRACT OF THE DISCLOSURE Disclosed is a data processing arrangement, comprising two sub- assemblies which are provided in two channels and which are controlled stepwise by a common timing current supply which emits at each processing step, in addition to a number of control signals, a monitoring pulse for scanning comparators connected in series for each two comparable signals from the two channels. The comparators apply to the timing current supply, when appropriate signal pairs are present, the monitoring pulse, as fault-free signal, for initiating the control signals required for the next processing step, and a further monitoring pulse. Two micro-computers are fed from two unidirectional voltage sources independent of one another, of the micro- processors of which micro-computers equivalent connecting pins for addresses, data and control signals to be emitted are connected in pairs to respective comparators. There is provided in the timing current supply for the dynamic signals a monitoring unit which disconnects the unidirectional-voltage sources in the absence of the error-free signal.

266894

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