Digital frequency-lock circuit

H - Electricity – 03 – K

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328/102

H03K 3/00 (2006.01) H03L 7/099 (2006.01)

Patent

CA 1104663

Case 04-4143-U.S. APPLICATION OF FRANK LYNCH DIGITAL FREQUENCY-LOCK CIRCUIT ABSTRACT A digital frequency-lock circuit has a binary rate multiplier connected between a fixed frequency oscillator and an output terminal to modify the oscillator output signal in accordance with a digital word. A up/down counter is arranged to supply the digital word to the rate multi- plier in accordance with a count stored in the counter. The frequency of the rate multiplier output is compared with an input signal frequency during a cycle of the input signal to maintain a predetermined relationship between the compared frequencies.

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