Digital logic ring circuitry with reduced interconnection...

H - Electricity – 03 – K

Patent

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328/127

H03K 19/08 (2006.01)

Patent

CA 2000555

-10- DIGITAL LOGIC RING CIRCUITRY WITH REDUCED INTERCONNECTION WIRING LENGTH Abstract In order to reduce length of wiring interconnection between the first (FF1) and last (FFN) stages of, for example. Johnson counter circuitry laid out along a row, the last stage is relocated to the position at the beginning of the row where the first stage originally was located, and the remaining stages are relocated so that the order of spatial sequence of the stages becomes N, 1, N-1, 2, N-2, 3, .... where N is the ordinal number of the last stage. Using such a layout for counter circuitry, elastic storage devices can readily be made with such counter circuitry for the read or write counters therein or both.

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