Digital loop carrier system having multiplexed interrupt...

H - Electricity – 04 – J

Patent

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363/10

H04J 3/24 (2006.01)

Patent

CA 1309520

ABSTRACT OF THE DISCLOSURE Digital loop carrier system having CPU to channel unit protocol. A method of communicating with the protocol is used in a telecommunication system having at least a central processing unit (CPU) connected to a plurality of digital interface units (DIU) via a communication module (CM). Each of the digital interface units is connected to a plurality of channel units (CU). The method has the steps of: sending from the CPU to the COM a command message having at least a first DIU address of a selected DIU of the plurality of DIU's, a channel address of a selected CU of the plurality of CU's, a second DIU address, the second DIU address being substantially identical to the first DIU address, and a first information portion; sending substantially the command message from the COM to the plurality of DIU's, the selected DIU receiving the command message; and in the selected DIU removing the first DIU address from the command message to form a modified message, and sending the modified message from the selected DIU to the plurality of CU's, the selected CU receiving the modified message. The selected module provides a response message to the CPU. The protocol provides a comprehensive response format which identifies the responding module, type of response, and if in error, who detected the error and type of error detected.

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