Digital phase lock loop decoder

Details Digital phase lock loop decoder Digital phase lock loop decoder

H - Electricity

03

M

354/67

H03M 7/14 (2006.01) H03M 5/12 (2006.01) H04L 7/033 (2006.01) H04L 7/04 (2006.01)

Patent

CA 2026323

A digital phase lock loop decoder for use in decoding Manchester encoded data operates at an internal clock speed having a speed equal to the data rate of the encoded data. The decoder includes sampling means for providing signals based on the clock speed of the encoded data, delay means for generating delayed clock signals relative to the clock speed of the encoded data, sampling means for sampling the encoded data based on said delayed clock signals, means for generating clock signals whose phase corresponds with the phase of the delayed clock signals and means for outputting decoded data signals corresponding to the encoded data utlizing the delayed clock signals.

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