Digital phase-locked loop circuits

Details Digital phase-locked loop circuits Digital phase-locked loop circuits

H - Electricity

03

B

331/35

H03B 7/02 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1280473

Abstract A digital phase-locked loop circuit, having a transition detector for an input signal; a first counter receiving the output of a local oscillator whose count is started or stopped by opposite transitions of the input signal; a second counter receiving the output of the local oscillator which responds to a specific type of input signal transition to transfer its count to an output; a circuit which outputs signals relating to the sign of the phase difference between the signal of local oscillator and the input signal by operating on counts executed by the first and second counters; and a digital filter, which operates on the signals corresponding to the sign of the phase difference and outputs signals which are used to increment or decrement the second counter which outputs the regenerated clock signal. The circuit further includes a counter of correction signals which is incremented or decremented depending upon the signs of the signals received from the digital filter; a frame signal counter whose overflow signal causes the correction signal counter to output its count; a logic circuit which outputs its count as well as the number and type of corrections, uniformly distributed in a suitable number of frames on the basis of the counts of the correction signal and frame signal counter outputs. The correction signals are supplied by the logic circuit used to increment or decrement the second counter of the local oscillator. The present invention can achieve high jitter reduction, and good resolution and rapid estimation of the received signal phase as well as eliminating the need for initial or periodic adjustments.

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